Master thesis defense by Hao Tang

Dielectric Characterization and Charge Noise Analysis

Semiconductor spin qubits are a promising platform for fault-tolerant quantum computing, but their performance is affected by charge noise originating from interface traps and material defects. Conventional verification of fabrication processes requires lengthy cryogenic characterization, motivating the development of faster characterization methods. This thesis investigates the impedance spectroscopy of MOS capacitors for rapid extraction of interface trap density using the conductance method. A noise model based on Shockley trap statistics and Coulomb coupling is developed to establish a quantitative relationship between room-temperature interface trap characterization and cryogenic qubit dephasing. The proposed approach enables rapid prediction of oxide interface-trap-induced qubit performance without requiring extensive low-temperature measurements. The results demonstrate that an interface trap density of Dit = 10^12eV−1cm−2 at T = 100 mK leads to a noise amplitude S0 = 2.49 µV^2/Hz at 1 Hz. Under a magnetic field of B = 117.5 mT, the corresponding dephasing time is estimated to be T2* = 28.5µs. In addition, a full-coupon device screening protocol is developed and experimentally validated using Hall bar and quantum dot devices, which minimizes unnecessary effort spent on defective devices.