NQCP Life in Quantum; Head of Decoding Neil Gillespie, Riverlane

Efficient hardware decoding for quantum computers

Quantum error correction generates a stream of syndrome data containing information about the errors in a quantum computer; as systems scale and lower logical error rates are required for longer computations, the amount of data that needs to be processed increases significantly. Large computations will require real-time decoders that can process the stream of data at the rate it is received to avoid the creation of a data backlog that grows exponentially and grinds the computation to a halt. In this talk, we will discuss parallelisation techniques that we have developed to help overcome this data backlog problem. Our parallelisation techniques can lead to a slow-down of the logical clock speed of a quantum computer. Therefore, time permitting, we will also discuss an efficient decoder that we developed and implemented on classical hardware (both FPGAs and ASICs) to maintain a good logical clock rate.

This talk is based on the two papers:

-Parallel window decoding enables scalable fault tolerant quantum computation. Skoric et al., Nature Communications, Nov. 2023.

-A real-time scalable, fast and highly resource efficient decoder for a quantum computer. Barber et al. ArXiv:2309.05558

After the talk there will be exciting discussions, networking, and refreshments in Fb7.